Parastoo Soleimani

Orcid: 0000-0002-1842-3613

According to our database1, Parastoo Soleimani authored at least 6 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A Partitioned CAM Architecture with FPGA Acceleration for Binary Descriptor Matching.
ACM Trans. Reconfigurable Technol. Syst., March, 2024

2022
A circular shifting binary descriptor for efficient rotation invariant image matching.
Proceedings of the 26th International Conference on Pattern Recognition, 2022

2021
Real-time FPGA-based implementation of the AKAZE algorithm with nonlinear scale space generation using image partitioning.
J. Real Time Image Process., 2021

2020
A Novel Hardware-Software Co-Design and Implementation of the HOG Algorithm.
Sensors, 2020

Analysis and Comparison of FPGA-Based Histogram of Oriented Gradients Implementations.
IEEE Access, 2020

2019
FPGA-based Implementation of HOG Algorithm: Techniques and Challenges.
Proceedings of the IEEE Pacific Rim Conference on Communications, 2019


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