Partha Sharathi Mallick

According to our database, Partha Sharathi Mallick authored at least 17 papers between 2012 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2020

Geometry-Based Crosstalk Reduction in CNT Interconnects.

Piratla Uma Sathyakam, Partha Sharathi Mallick, Paridhi Singh

J. Circuits Syst. Comput., 2020

2019

High-speed sub-threshold operation of carbon nanotube interconnects.

Piratla Uma Sathyakam, Partha Sharathi Mallick, Anmol Ajay Saxena

IET Circuits Devices Syst., 2019

2018

Performance Analysis of Handover Schemes in Heterogeneous Networks.

Annasamy Bagubali, Tanmay Verma, Anurag Anand, V. Prithiviraj, Partha Sharathi Mallick

J. Circuits Syst. Comput., 2018

Spatial modulation and physical layer network coding based bidirectional relay network with transmit antenna selection over Nakagami-m fading channels.

Rajesh Ramanathan, Velmurugan Periakarupan Gurusamy Sivabalan, Thiruvengadam Sundarajan Jayaraman, Partha Sharathi Mallick

Int. J. Commun. Syst., 2018

Design of 5-3 multicolumn compressor for high performance multiplier.

R. Marimuthu, S. Balamurugan, Partha Sharathi Mallick

Int. J. Comput. Aided Eng. Technol., 2018

Review on IMS-4G-cloud networks maintaining service continuity using distributed multi agent scheme.

Annasamy Bagubali, V. Prithiviraj, Partha Sharathi Mallick

Int. J. Comput. Aided Eng. Technol., 2018

Low Complexity Compressive Sensing Greedy Detection of Generalized Quadrature Spatial Modulation.

Rajesh Ramanathan, Partha Sharathi Mallick, Thiruvengadam Sundarajan Jayaraman

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018

2017

Error Compensation Techniques for Fixed-Width Array Multiplier Design - A Technical Survey.

S. Balamurugan, Partha Sharathi Mallick

J. Circuits Syst. Comput., 2017

Design and Analysis of Multiplier Using Approximate 15-4 Compressor.

R. Marimuthu, Y. Elsie Rezinold, Partha Sharathi Mallick

IEEE Access, 2017

2016

Outage performance of bidirectional full duplex AF relay network with joint antenna and relay selection in Nakagami-m fading environment.

Rajesh Ramanathan, Velmurugan Periakarupan Gurusamy Sivabalan, Thiruvengadam Sundarajan Jayaraman, Partha Sharathi Mallick

Proceedings of the 8th International Conference on Communication Systems and Networks, 2016

2015

Enhancing Coverage and Rate of Cell Edge User in Multi-Antenna Poisson Voronoi Cells.

S. Balaji, R. Santhakumar, Partha Sharathi Mallick

J. Circuits Syst. Comput., 2015

2014

Enhancement of test data compression with multistage encoding.

S. Sivanantham, M. Padmavathy, Ganga Gopakumar, Partha Sharathi Mallick, J. Raja Paul Perinbam

Integr., 2014

Low-power selective pattern compression for scan-based test applications.

S. Sivanantham, Partha Sharathi Mallick, J. Raja Paul Perinbam

Comput. Electr. Eng., 2014

2012

Towards realisation of mixed carbon nanotube bundles as VLSI interconnects: A review.

Piratla Uma Sathyakam, Partha Sharathi Mallick

Nano Commun. Networks, 2012

Design of low power fixed-width multiplier with row bypassing.

S. Balamurugan, Sneha Ghosh, Atul, Balakumaran Srirangaswamy, R. Marimuthu, Partha Sharathi Mallick

IEICE Electron. Express, 2012

CSP-Filling: A New X-Filling Technique to Reduce Capture and Shift Power in Test Applications.

S. Sivanantham, K. Sarathkumar, Jincy P. Manuel, Partha Sharathi Mallick, J. Raja Paul Perinbam

Proceedings of the International Symposium on Electronic System Design, 2012

FPGA design and implementation of truncated multipliers using bypassing technique.

S. Balamurugan, Balakumaran Srirangaswamy, R. Marimuthu, Partha Sharathi Mallick

Proceedings of the 2012 International Conference on Advances in Computing, 2012