Patricia J. Teller

Affiliations:
  • University of Texas at El Paso, USA


According to our database1, Patricia J. Teller authored at least 53 papers between 1985 and 2018.

Collaborative distances:
  • Dijkstra number2 of two.
  • Erdős number3 of three.

Timeline

Legend:

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PhD thesis 
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Online presence:

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Bibliography

2018
Employing MPI_T in MPI Advisor to optimize application performance.
Int. J. High Perform. Comput. Appl., 2018

2017
Neighbor discovery message hold times for MANETs.
Comput. Commun., 2017

Stampede 2: The Evolution of an XSEDE Supercomputer.
Proceedings of the Practice and Experience in Advanced Research Computing 2017: Sustainability, 2017

2TL: A Scheduling Algorithm for Meeting the Latency Requirements of Bursty I/O Streams at User-Specified Percentiles.
Proceedings of the 2017 International Conference on Cloud and Autonomic Computing, 2017

2016
Cross-Accelerator Performance Profiling.
Proceedings of the XSEDE16 Conference on Diversity, 2016

Minimization of Xeon Phi Core Use with Negligible Execution Time Impact.
Proceedings of the XSEDE16 Conference on Diversity, 2016

Resource consumption prediction using neuro-fuzzy modeling.
Proceedings of the 2016 Annual Conference of the North American Fuzzy Information Processing Society, 2016

2015
MPI Advisor: a Minimal Overhead Tool for MPI Library Performance Tuning.
Proceedings of the 22nd European MPI Users' Group Meeting, 2015

Communication Patterns of Cloud Computing.
Proceedings of the 2015 IEEE Globecom Workshops, San Diego, CA, USA, December 6-10, 2015, 2015

The effect of network delay estimation error on computation offloading decisions.
Proceedings of the 4th IEEE International Conference on Cloud Networking, 2015

2014
FAIRIO: A Throughput-oriented Algorithm for Differentiated I/O Performance.
Int. J. Parallel Program., 2014

Training, education, and outreach - raising the bar.
Concurr. Comput. Pract. Exp., 2014

2012
Evaluation of Core Performance when the Node is Power Capped Using Intel® Data Center Manager.
Proceedings of the 41st International Conference on Parallel Processing Workshops, 2012

2011
FAIRIO: An Algorithm for Differentiated I/O Performance.
Proceedings of the 23rd International Symposium on Computer Architecture and High Performance Computing, 2011

2009
Modeling and Analysis of Checkpoint I/O Operations.
Proceedings of the Analytical and Stochastic Modeling Techniques and Applications, 2009

2007
Virtual I/O scheduler: a scheduler of schedulers for performance virtualization.
Proceedings of the 3rd International Conference on Virtual Execution Environments, 2007

Evaluation of IEEE 754 floating-point arithmetic compliance across a wide range of heterogeneous computers.
Proceedings of the Richard Tapia Celebration of Diversity in Computing Conference 2007, 2007

SimBA: A Discrete Event Simulator for Performance Prediction of Volunteer Computing Projects.
Proceedings of the 21st International Workshop on Principles of Advanced and Distributed Simulation, 2007

Modeling the Impact of Checkpoints on Next-Generation Systems.
Proceedings of the 24th IEEE Conference on Mass Storage Systems and Technologies (MSST 2007), 2007

Moving Volunteer Computing towards Knowledge-Constructed, Dynamically-Adaptive Modeling and Scheduling.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Throttling I/O Streams to Accelerate File-IO Performance.
Proceedings of the High Performance Computing and Communications, 2007

2006
Insights into providing dynamic adaptation of operating system policies.
ACM SIGOPS Oper. Syst. Rev., 2006

Poster reception - SimBA: a discrete event simulator for performance prediction of volunteer computing projects.
Proceedings of the ACM/IEEE SC2006 Conference on High Performance Networking and Computing, 2006

Rate-Controlled Scheduling of Expired Writes for Volatile Caches.
Proceedings of the Third International Conference on the Quantitative Evaluation of Systems (QEST 2006), 2006

Unification of verification and validation methods for software systems: progress report and initial case study formulation.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

A systematic multi-step methodology for performance analysis of communication traces of distributed applications based on hierarchical clustering.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

The Effectiveness of Threshold-Based Scheduling Policies in BOINC Projects.
Proceedings of the Second International Conference on e-Science and Grid Technologies (e-Science 2006), 2006

Fairness and Performance Isolation: an Analysis of Disk Scheduling Algorithms.
Proceedings of the 2006 IEEE International Conference on Cluster Computing, 2006

2005
Towards a cross-platform microbenchmark suite for evaluating hardware performance counter data.
Proceedings of the Richard Tapia Celebration of Diversity in Computing Conference 2005, 2005

Metrics for Effective Resource Management in Global Computing Environments.
Proceedings of the First International Conference on e-Science and Grid Technologies (e-Science 2005), 2005

2004
Mining Performance Data from Sampled Event Traces.
Proceedings of the 12th International Workshop on Modeling, 2004

A Framework for Profiling Multiprocessor Memory Performance.
Proceedings of the 10th International Conference on Parallel and Distributed Systems, 2004

2003
Combining learning strategies and tools in a first course in computer architecture.
Proceedings of the 2003 workshop on Computer architecture education, 2003

An Approach to Optimizing Adaptive Parabolic PDE Solvers for the Grid.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

2002
Model-Based Control of Adaptive Applications: An Overview.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

2001
Increasing the enrollment of women in computer science.
Proceedings of the 32rd SIGCSE Technical Symposium on Computer Science Education, 2001

2000
POEMS: End-to-End Performance Design of Large Parallel Adaptive Computational Systems.
IEEE Trans. Software Eng., 2000

An Integrated Development of a Dynamic Software-Fault Monitoring System.
Trans. SDPS, 2000

Structuring the student research experience.
Proceedings of the 5th Annual SIGCSE Conference on Innovation and Technology in Computer Science Education, 2000

1999
Towards the design of a snoopy coprocessor for dynamic software-fault detection.
Proceedings of the IEEE International Performance Computing and Communications Conference, 1999

Are all scientific workloads equal?
Proceedings of the IEEE International Performance Computing and Communications Conference, 1999

DynaMICs: An Automated and Independent Software-FaultDetection Approach.
Proceedings of the 4th IEEE International Symposium on High-Assurance Systems Engineering (HASE '99), 1999

1998
Poems: end-to-end performance design of large parallel adaptive computational systems.
Proceedings of the First International Workshop on Software and Performance, 1998

1995
Mobile Robots Teach Machine-Level Programming.
Proceedings of the Proceedings Supercomputing '95, San Diego, CA, USA, December 4-8, 1995, 1995

Configuring a large LAN for TCP/IP, Appletalk, and IPX.
Proceedings of the Proceedings 20th Conference on Local Computer Networks (LCN'95), 1995

Unified vs. split TLBs and caches in shared-memory MP systems.
Proceedings of IPPS '95, 1995

Unscheduled Traces and Shared-Memory Multiprocessor Simulation.
Proceedings of the 1995 International Conference on Parallel Processing, 1995

1994
Locating Multiprocessor TLBs at Memory.
Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS-27), 1994

1993
Optimization Techniques for Directory-Based Cache Coherence Protocols for Large-Scale Multiprocessors.
Proceedings of the Parallel Computing: Trends and Applications, 1993

1991
Performance Evaluation of Solutions to the TLB Consistency Problem.
PhD thesis, 1991

1990
Translation-Lookaside Buffer Consistency.
Computer, 1990

1989
A compact design for a highly-parallel shared-memory MIMD computer.
Proceedings of the Thirty-Fourth IEEE Computer Society International Conference: Intellectual Leverage, 1989

1985
Issues Related to MIMD Shared-memory Computers: The NYU Ultracomputer Approach.
Proceedings of the 12th Annual Symposium on Computer Architecture, 1985


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