Paul G. Y. Tsui

According to our database, Paul G. Y. Tsui authored at least 3 papers between 1991 and 1995.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1995

Limitation of CMOS supply-voltage scaling by MOSFET threshold-voltage variation.

Shih-Wei Sun, Paul G. Y. Tsui

IEEE J. Solid State Circuits, August, 1995

1993

Study of BiCMOS logic gate configurations for improved low-voltage performance.

Paul G. Y. Tsui, Bernie Pappert, Shih-Wei Sun, John R. Yeargain

IEEE J. Solid State Circuits, March, 1993

1991

A circuit level hot-carrier evaluation system.

Paul G. Y. Tsui, Peter M. Lee, Frank K. Baker, James D. Hayden, Lee Howington, Tom Tiwald, Brian Mowry

IEEE J. Solid State Circuits, March, 1991