Paul T. Watkins
According to our database1, Paul T. Watkins authored at least 5 papers between 2006 and 2014.
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Time interleaved 16 bit, 250MS/s ADC using a hybrid voltage/current mode architecture with foreground calibration.
Proceedings of the ESSCIRC 2014, 2014
IEEE J. Solid State Circuits, 2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
Signal amplification, detection and transmission in a wireless 100-electrode neural recording system.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006