Paulo Garcia

Orcid: 0000-0002-1041-5205

According to our database1, Paulo Garcia authored at least 43 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Bibliography

2024
Agents Need Not Know Their Purpose.
CoRR, 2024

Preserving Power Optimizations Across the High Level Synthesis of Distinct Application-Specific Circuits.
CoRR, 2024

Accelerating Boolean Constraint Propagation for Efficient SAT-Solving on FPGAs.
CoRR, 2024

2023
The Good, the Bad and the Ugly: Practices and Perspectives on Hardware Acceleration for Embedded Image Processing.
J. Signal Process. Syst., October, 2023

FPGAs (Can Get Some) SATisfaction.
CoRR, 2023

On a Functional Definition of Intelligence.
CoRR, 2023

PhyOT: Physics-informed object tracking in surveillance cameras.
CoRR, 2023

Intelligent Autonomous Robots: Cooperative Sharing for Energy Management in Industrial IoT.
Proceedings of the Asia Conference on Artificial Intelligence, 2023

2022
Arbitrarily Parallelizable Code: A Model of Computation Evaluated on a Message-Passing Many-Core System.
Comput., 2022

Improved Joint Estimation for Body-Mounted Motion Capture Sensors Using Human Kinematics Prior Knowledge.
Proceedings of the 2022 IEEE Sensors, Dallas, TX, USA, October 30 - Nov. 2, 2022, 2022

Internet of Wearables: Fog Extrapolation for Reduced Data Collection and Expanded Capture Volume in Real-Time Motion Capture Edge Devices.
Proceedings of the IEEE International Conference on Cloud Computing Technology and Science, 2022

2021
Effectiveness of Multi-Abstraction Computing Tools on Promoting Exploratory Self-learning in Engineering: a Case Study using a Custom Real-Time Operating System for Remote Learning.
Proceedings of the IECON 2021, 2021

Strategies for Heterogeneous Multi-Core Processing Based on Graph Programming.
Proceedings of the ICCDE 2021: 7th International Conference on Computing and Data Engineering, Phuket, Thailand, January 15, 2021

Near-Native Interrupt Latency in Real-Time Guests: Handler Emulation Through Memory Map Morphing.
Proceedings of the ICCDE 2021: 7th International Conference on Computing and Data Engineering, Phuket, Thailand, January 15, 2021

Modeling Pandemic Response for Populations Equipped with Contact-Chain Capable Wearable Devices.
Proceedings of the Annual Modeling and Simulation Conference, 2021

2020
Ethical Applications of Big Data-Driven AI on Social Systems: Literature Analysis and Example Deployment Use Case.
Inf., 2020

Coherency overhead of Processing-in-Memory in the presence of shared data.
Proceedings of the 2020 IEEE International Conference on Industrial Technology, 2020

Programming Abstractions for Configurable Hardware: Survey and Research Directions.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

Towards a Programming Paradigm for Reconfigurable Computing: Asynchronous Graph Programming.
Proceedings of the 25th IEEE International Conference on Emerging Technologies and Factory Automation, 2020

2019
Verifying parallel dataflow transformations with model checking and its application to FPGAs.
J. Syst. Archit., 2019

Optimized Memory Allocation and Power Minimization for FPGA-Based Image Processing.
J. Imaging, 2019

Graphical program transformations for embedded systems.
Proceedings of the 34th ACM/SIGAPP Symposium on Applied Computing, 2019

2018
RIPL: A Parallel Image Processing Language for FPGAs.
ACM Trans. Reconfigurable Technol. Syst., 2018

Area-Energy Aware Dataflow Optimisation of Visual Tracking Systems.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2017
Power efficient dataflow design for a heterogeneous smart camera architecture.
Proceedings of the 2017 Conference on Design and Architectures for Signal and Image Processing, 2017

2016
Hybrid real-time operating systems: deployment of critical FreeRTOS features on FPGA.
Int. J. Embed. Syst., 2016

Bringing Hardware Multithreading to the Real-Time Domain.
IEEE Embed. Syst. Lett., 2016

On-Chip Message Passing Sub-System for Embedded Inter-Domain Communication.
IEEE Comput. Archit. Lett., 2016

A Dataflow IR for Memory Efficient RIPL Compilation to FPGAs.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2016

2015
Task-Aware Interrupt Controller: Priority Space Unification in Real-Time Systems.
IEEE Embed. Syst. Lett., 2015

RT-SHADOWS: Real-time system hardware for agnostic and deterministic OSes within softcore.
Proceedings of the 20th IEEE Conference on Emerging Technologies & Factory Automation, 2015

2014
Towards hardware embedded virtualization technology: architectural enhancements to an ARM SoC.
SIGBED Rev., 2014

2013
SW and HW speculative Nelder-Mead execution for high performance unconstrained optimization.
Proceedings of the 2013 International Symposium on System on Chip, 2013

Hardware-software extensions to a softcore processor for FPGA-based adaptive PID control.
Proceedings of the 22nd IEEE International Symposium on Industrial Electronics, 2013

Generative component-based IP camera design.
Proceedings of the 22nd IEEE International Symposium on Industrial Electronics, 2013

2012
A generative-oriented model-driven design environment for customizable video surveillance systems.
EURASIP J. Embed. Syst., 2012

RAPTOR-Design: Refactorable Architecture Processor to Optimize Recurrent Design.
Proceedings of the 2012 Brazilian Symposium on Computing System Engineering, 2012

Exploring metrics tradeoffs in a multithreading extensible processor.
Proceedings of the 21st IEEE International Symposium on Industrial Electronics, 2012

A PID controller module tightly-coupled on a processor datapath.
Proceedings of the 21st IEEE International Symposium on Industrial Electronics, 2012

Multi-Camera Home Appliance Network: Handling device interoperability.
Proceedings of the IEEE 10th International Conference on Industrial Informatics, 2012

Shifting SOA to MPSoC: An exploratory example of application.
Proceedings of 2012 IEEE 17th International Conference on Emerging Technologies & Factory Automation, 2012

Reliability correlation between physical and virtual cores at the ISA level.
Proceedings of 2012 IEEE 17th International Conference on Emerging Technologies & Factory Automation, 2012

A Fault Tolerant Design Methodology for a FPGA-Based Softcore Processor.
Proceedings of the 1st Conference on Embedded Systems, 2012


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