Pavan Poluri

According to our database1, Pavan Poluri authored at least 6 papers between 2009 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2016
Shield: A Reliable Network-on-Chip Router Architecture for Chip Multiprocessors.
IEEE Trans. Parallel Distributed Syst., 2016

2015
A Soft Error Tolerant Network-on-Chip Router Pipeline for Multi-Core Systems.
IEEE Comput. Archit. Lett., 2015

2014
An Improved Router Design for Reliable On-Chip Networks.
Proceedings of the 2014 IEEE 28th International Parallel and Distributed Processing Symposium, 2014

2013
Tackling Permanent Faults in the Network-on-Chip Router Pipeline.
Proceedings of the 25th International Symposium on Computer Architecture and High Performance Computing, 2013

2011
ROBUST: a new self-healing fault-tolerant NoC router.
Proceedings of the 4th International Workshop on Network on Chip Architectures, 2011

2009
A Methodology for Producing Improved Focused Elements.
Proceedings of the Focused Retrieval and Evaluation, 2009


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