Pavan Poluri

According to our database, Pavan Poluri authored at least 6 papers between 2009 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

Shield: A Reliable Network-on-Chip Router Architecture for Chip Multiprocessors.

Pavan Poluri, Ahmed Louri

IEEE Trans. Parallel Distributed Syst., 2016

2015

A Soft Error Tolerant Network-on-Chip Router Pipeline for Multi-Core Systems.

Pavan Poluri, Ahmed Louri

IEEE Comput. Archit. Lett., 2015

2014

An Improved Router Design for Reliable On-Chip Networks.

Pavan Poluri, Ahmed Louri

Proceedings of the 2014 IEEE 28th International Parallel and Distributed Processing Symposium, 2014

2013

Tackling Permanent Faults in the Network-on-Chip Router Pipeline.

Pavan Poluri, Ahmed Louri

Proceedings of the 25th International Symposium on Computer Architecture and High Performance Computing, 2013

2011

ROBUST: a new self-healing fault-tolerant NoC router.

Jacques Henri Collet, Ahmed Louri, Vivek Tulsidas Bhat, Pavan Poluri

Proceedings of the 4th International Workshop on Network on Chip Architectures, 2011

2009

A Methodology for Producing Improved Focused Elements.

Carolyn J. Crouch, Donald B. Crouch, Dinesh Bhirud, Pavan Poluri, Chaitanya Polumetla, Varun Sudhakar

Proceedings of the Focused Retrieval and Evaluation, 2009