Pengjie Wang

Orcid: 0009-0000-9006-8946

Affiliations:

Fudan University, State Key Laboratory of Integrated Chips and Systems, Shanghai, China

According to our database¹, Pengjie Wang authored at least 3 papers between 2022 and 2025.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of five.

Timeline

Legend:

Book

In proceedings

Article

PhD thesis

Dataset

Other

Bibliography

2025

A 65.9-dB PSRR, Compact LNA Array for Correlated Noise Compression in High-Channel-Count Pitch-Matched Ultrasound ASICs.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, July, 2025

2024

A 2.2μW PWM-Based Time-Domain Sensor Interface With 540mV<sub>pp</sub> Input Signal Range, 81.6dB SNDR and 80MΩ Input Impedance.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, April, 2024

2022

A 0.8V/0.6V 2.2μW Time-Domain Analog Front-End with $540\text{mV}_{\text{pp}}$ Input Range, 81.6dB SNDR and $80\mathrm{M}\Omega$ Input Impedance.

[BibT_eX]

[DOI]

Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

Pengjie Wang

Timeline

Legend:

Links

Online presence:

On csauthors.net:

Bibliography

Loading...