Zhiliang Hong

This page is a disambiguation page, it actually contains multiple papers from persons of the same or a similar name.

Known people with the same name:

Bibliography

2026
A 6.12-to-8.62GHz Class-F23 VCO with Series-LC Assistance Achieving 195.9dBc/Hz FoMT at 100kHz Offset.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2019
A Compact Quadrature Doherty Digital Power Amplifier with Backoff Efficiency Enhancement.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

A curvature corrected bandgap reference with mismatch cancelling and noise reduction.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

Dual-Loop-Controlled AC-Coupling 100MHz Bandwidth Envelope Tracking Modulator for 5G RF Power Amplifier.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

The Digital Front End with Dual-box Digital Pre-distortion in All-digital Quadrature Transmitter.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

High-Bandwidth Wide-Output-Swing Linear Amplifier for LTE-100MHz Envelope Tracking.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

A35.2 dBm CMOS RF Power Amplifier Using an 8-Way Current-Voltage Combining Transformer with Harmonic Control.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

2018
An Efficient Bayesian Optimization Approach for Automated Optimization of Analog Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Session 8 overview: Wireless power and harvesting: Power management subcommittee.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

A Digital ΣΔ Modulated Class-S Transmitter with Two-Step Up-conversion and Filter-less Front End.
Proceedings of the International SoC Design Conference, 2018

A Physically Unclonable Function with BER < 0.35% for Secure Chip Authentication Using Write Speed Variation of RRAM.
Proceedings of the 48th European Solid-State Device Research Conference, 2018

2017
A 4.6-5.6 GHz constant KVCO low phase noise LC-VCO and an optimized automatic frequency calibrator applied in PLL frequency synthesizer.
Proceedings of the IECON 2017 - 43rd Annual Conference of the IEEE Industrial Electronics Society, Beijing, China, October 29, 2017

The implement of digital front end in all-digital quadrature RF transmitter.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2015
A 400mV supply voltage self-start clock generator for energy harvest system.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014
4.3 An 87%-peak-efficiency DVS-capable single-inductor 4-output DC-DC buck converter with ripple-based adaptive off-time control.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013
VCCS controlled LDO with small on-chip capacitor.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012
A sub-sampling 4.25 GS/s 3-bit flash ADC with asymmetric spatial filter response.
Microelectron. J., 2012

A 10MHz ripple-based on-time controlled buck converter with dual ripple compensation and real-time efficiency optimization.
Proceedings of the 38th European Solid-State Circuit conference, 2012

2011
A 90% peak efficiency single-inductor dual-output buck-boost converter with extended-PWM control.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A single-inductor multiple-bipolar-output (SIMBO) converter with fully-adaptive feedback matrix and improved light-load ripple.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

A CMOS broadband precise programmable gain amplifier with bandwidth extension technique.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

A low-power 4.224GS/s sampler in 0.13-µm CMOS for IR UWB receiver.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

A 0.8-3GHz 40dB dynamic range CMOS variable-gain amplifier.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

A 4GS/s 3b two-way time-interleaved ADC in 0.13um CMOS.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010
Blind carrier frequency offset estimation for constant modulus signaling based OFDM systems: algorithm, identifiability, and performance analysis.
J. Zhejiang Univ. Sci. C, 2010

Design of 4-bit parallel sub-sampling A/D converter for IR-UWB receiver.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

Blind CFO Estimation for Constant Modulus Signaling Based OFDM Systems.
Proceedings of IEEE International Conference on Communications, 2010

2009
A single-inductor dual-output switching converter with low ripples and improved cross regulation.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008
A CMOS 434/868 MHz FSK/OOK transmitter with integrated fractional-N PLL.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

Design of single-inductor dual-output switching converters with average current mode control.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2004
Low memory and low complexity VLSI implementation of JPEG2000 codec.
IEEE Trans. Consumer Electron., 2004

2002
Design and implementation of a turbo decoder for 3G W-CDMA systems.
IEEE Trans. Consumer Electron., 2002


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