Peter Gillingham

Orcid: 0009-0004-1970-5921

According to our database1, Peter Gillingham authored at least 6 papers between 1991 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2025
Enhancing IoT Defenses Against Radio Jamming: Insights from a Thread Testbed Case Study.
Proceedings of the 18th European Workshop on Systems Security, 2025

2013
800 MB/s DDR NAND Flash Memory Multi-Chip Package With Source-Synchronous Interface for Point-to-Point Ring Topology.
IEEE Access, 2013

1999
Two High-Bandwidth Memory Bus Structures.
IEEE Des. Test Comput., 1999

1998
Re-inventing the DRAM for embedded use: a compiled, wide-databus DRAM macrocell with high bandwidth and low power.
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998

1997
SLDRAM: high-performance, open-standard memory.
IEEE Micro, 1997

1991
High-speed, high-reliability circuit design for megabit DRAM.
IEEE J. Solid State Circuits, August, 1991


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