Peter J. Edwards

Affiliations:
  • Edinburgh University, Dept. of Electrical Engineering, Scotland


According to our database1, Peter J. Edwards authored at least 17 papers between 1992 and 2002.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2002
Minimizing risk using prediction uncertainty in neural network estimation fusion and its application to papermaking.
IEEE Trans. Neural Networks, 2002

2001
Confidence estimation methods for neural networks: a practical comparison.
IEEE Trans. Neural Networks, 2001

2000
A Study of Early Stopping and Model Selection Applied to the Papermaking Industry.
Int. J. Neural Syst., 2000

Committee formation for reliable and accurate neural prediction in industry.
Proceedings of the 8th European Symposium on Artificial Neural Networks, 2000

1999
The application of neural networks to the papermaking industry.
IEEE Trans. Neural Networks, 1999

The application of neural networks to the paper-making industry.
Proceedings of the 7th European Symposium on Artificial Neural Networks, 1999

1998
Towards Optimally Distributed Computation.
Neural Comput., 1998

Weight saliency regularization in augmented networks.
Proceedings of the 6th European Symposium on Artificial Neural Networks, 1998

1997
Penalty terms for fault tolerance.
Proceedings of International Conference on Neural Networks (ICNN'97), 1997

1996
Modelling weight- and input-noise in MLP learning.
Proceedings of International Conference on Neural Networks (ICNN'96), 1996

1995
Can deterministic penalty terms model the effects of synaptic weight noise on network fault-tolerance?
Int. J. Neural Syst., 1995

1994
Analogue imprecision in MLPs implications and learning improvements.
PhD thesis, 1994

Enhanced MLP performance and fault tolerance resulting from synaptic weight noise during training.
IEEE Trans. Neural Networks, 1994

1993
Synaptic weight noise during multilayer perceptron training: fault tolerance and training improvements.
IEEE Trans. Neural Networks, 1993

Pulse Stream Vlsi Circuits And Systems: The Epsilon Neural Network Chipset.
Int. J. Neural Syst., 1993

Analogue Synaptic Noise - Implications And Learning Improvements.
Int. J. Neural Syst., 1993

1992
Synaptic Weight Noise During MLP Learning Enhances Fault-Tolerance, Generalization and Learning Trajectory.
Proceedings of the Advances in Neural Information Processing Systems 5, [NIPS Conference, Denver, Colorado, USA, November 30, 1992


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