Piyumal Ranawaka

According to our database, Piyumal Ranawaka authored at least 4 papers between 2019 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

BATCH-DNN: Adaptive and Dynamic Batching for Multi-DNN Accelerators.

Piyumal Ranawaka, Per Stenström

Proceedings of the Euro-Par 2025: Parallel Processing, 2025

2024

DNNOPT: A Framework for Efficiently Selecting On-chip Memory Loop Optimizations of DNN Accelerators.

Piyumal Ranawaka, Muhammad Waqar Azhar, Per Stenström

Proceedings of the 21st ACM International Conference on Computing Frontiers, 2024

2019

High Performance Application Specific Stream Architecture for Hardware Acceleration of HOG-SVM on FPGA.

Piyumal Ranawaka, Mongkol Ekpanyapong, Adriano Tavares, Mathew Dailey, Krit Athikulwongse, Vitor Alberto Silva

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2019

Application Specific Architecture for Hardware Accelerating HOG-SVM to Achieve High Throughput on HD Frames.

Piyumal Ranawaka, Mongkol Ekpanyapong, Adriano Tavares, Jorge Cabral, Krit Athikulwongse, Vitor Alberto Silva

Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019