Poorvaja Ramani
Orcid: 0009-0003-7316-7063
According to our database1,
Poorvaja Ramani
authored at least 3 papers
between 1999 and 2025.
Collaborative distances:
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Bibliography
2025
Meta's Second Generation AI Chip: Model-Chip Co-Design and Productionization Experiences.
Proceedings of the 52nd Annual International Symposium on Computer Architecture, 2025
2023
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023
1999
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999