Pruthvi Parate

According to our database, Pruthvi Parate authored at least 4 papers between 2024 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

Power and Area-Efficient ECC Processor with Sequential Recursive Polynomial Multiplier Implementation.

Pruthvi Parate, Alwin Shaju, D. R. Vasanthi, Madhav Rao

Proceedings of the 26th International Symposium on Quality Electronic Design, 2025

Non-Homogeneous Composite Karatsuba Multipliers Factored Hardware-Efficient ECDSA Generation and Verification Accelerator Units.

Pruthvi Parate, Alwin Shaju, Sanampudi Gopala Krishna Reddy, D. R. Vasanthi, Madhav Rao

Proceedings of the 26th International Symposium on Quality Electronic Design, 2025

A Generalized Hardware-Efficient Gabor Wavelet Architecture for Medical Image Processing.

Priyanka Agarwal, Pruthvi Parate, Madhav Rao

Proceedings of the 26th International Symposium on Quality Electronic Design, 2025

2024

Hardware-Efficient ECC Processor Design using Non-Homogeneous Split Hybrid Karatsuba Multiplier.

Pruthvi Parate, Alwin Shaju, Sanampudi Gopala Krishna Reddy, D. R. Vasanthi, Madhav Rao

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024