Purnachand Nalluri

Orcid: 0000-0002-3035-3259

According to our database1, Purnachand Nalluri authored at least 4 papers between 2012 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Bibliography

2015
Complexity reduction methods for fast motion estimation in HEVC.
Signal Process. Image Commun., 2015

2014
High speed SAD architectures for variable block size motion estimation in HEVC video coding.
Proceedings of the 2014 IEEE International Conference on Image Processing, 2014

2013
A novel SAD architecture for variable block size motion estimation in HEVC video coding.
Proceedings of the 2013 International Symposium on System on Chip, 2013

2012
Fast Motion Estimation Algorithm for HEVC.
Proceedings of the IEEE Second International Conference on Consumer Electronics - Berlin, 2012


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