R. Vijay Sai

According to our database, R. Vijay Sai authored at least 2 papers between 2019 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2020

Hyper switching memory utilization on hybrid main memory for improved task execution and reduced power consumption.

M. Prabhu, Har Narayan Upadhyay, R. Vijay Sai

Microprocess. Microsystems, 2020

2019

Undeviating Adaptive Sheltered Cryptography (UASC) method based low power and high secure cache memory design.

R. Vijay Sai, Har Narayan Upadhyay, M. Prabhu, S. Saravanan

Microprocess. Microsystems, 2019