Rafael A. Arce-Nazario

Des. Codes Cryptogr., March, 2024

2021

On the cut number problem for the 4, and 5-cubes.

[BibT_eX]

[DOI]

M. R. Emamy-K

Discret. Appl. Math., 2021

2020

Multidimensional linear complexity analysis of periodic arrays.

[BibT_eX]

[DOI]

Appl. Algebra Eng. Commun. Comput., 2020

2019

Bound for mixed exponential sums associated to binary good cyclic codes.

[BibT_eX]

[DOI]

Francis N. Castro

Braulio Molina

Finite Fields Their Appl., 2019

2018

New families of balanced symmetric functions and a generalization of Cusick, Li and Stǎnicǎ's conjecture.

[BibT_eX]

[DOI]

Des. Codes Cryptogr., 2018

2017

On the covering radius of some binary cyclic codes.

[BibT_eX]

[DOI]

Francis N. Castro

Adv. Math. Commun., 2017

2016

Modules to Teach Parallel and Distributed Computing Using MPI for Python and Disco.

[BibT_eX]

[DOI]

Edusmildo Orozco

Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

2013

Algebraic Symmetries of Generic $(m+1)$-Dimensional Periodic Costas Arrays.

[BibT_eX]

[DOI]

Oscar Moreno

Andrew Z. Tirkel

Solomon W. Golomb

IEEE Trans. Inf. Theory, 2013

2012

Multidimensional Costas Arrays and Their Enumeration Using GPUs and FPGAs.

[BibT_eX]

[DOI]

Int. J. Reconfigurable Comput., 2012

2011

Enumeration of Costas Arrays Using GPUs and FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

2010

Reconfigurable Hardware Implementation of a Multivariate Polynomial Interpolation Algorithm.

[BibT_eX]

[DOI]

Edusmildo Orozco

Dorothy Bollman

Int. J. Reconfigurable Comput., 2010

2009

A Systolic Array Based Architecture for Implementing Multivariate Polynomial Interpolation Tasks.

[BibT_eX]

[DOI]

Edusmildo Orozco

Dorothy Bollman

Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

2008

Mapping of Discrete Cosine Transforms onto Distributed Hardware Architectures.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2008

Architectural Model and Resource Estimation for Distributed Hardware Implementation of Discrete Signal Transforms.

[BibT_eX]

[DOI]

Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

2007

Algorithmic-level exploration of discrete signal transforms for partitioning to distributed hardware architectures.

[BibT_eX]

[DOI]

IET Comput. Digit. Tech., 2007

2006

High-Level Partitioning of Discrete Signal Transforms for Multi-FPGA Architectures.

[BibT_eX]

[DOI]

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Effects of High-Level Discrete Signal Transform Formulations on Partitioning for Multi-FPGA Architectures.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

2005

A diagnostic method for detecting and assessing the impact of physical design optimizations on routing.

[BibT_eX]

[DOI]

Robert F. Lembach