Rajendra M. Patrikar

According to our database, Rajendra M. Patrikar authored at least 39 papers between 2004 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

A Low-Cost Portable Dynamic Droplet Sensing System for Digital Microfluidics Applications.

Vandana Jain, Rajendra M. Patrikar

IEEE Trans. Instrum. Meas., 2020

2019

Development of Nonlinear Electromechanical Coupled Macro Model for Electrostatic MEMS Cantilever Beam.

Akanksha D. Singh, Rajendra M. Patrikar

IEEE Access, 2019

Modeling, Fabrication and Investigation of Mixing in Low-Cost Passive PDMS Micromixers.

T. Pravinraj, Rajendra M. Patrikar

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

2018

Dual frequency MEMS resonator through mixed electrical and mechanical coupling scheme.

Amol Morankar, Rajendra M. Patrikar

IET Circuits Devices Syst., 2018

Design and Fabrication of Versatile Low Power Wireless Sensor Nodes for IoT Applications.

Saket Thool, Raghavendra B. Deshmukh, Rajendra M. Patrikar

Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

Continuous Flow Microfluidic Channel Design for Blood Plasma Separation.

Jagriti Srivastava, Rajendra M. Patrikar

Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

High Level Synthesis and Implementation of Cryptographic Algorithm in AHIR Platform.

Abhimanniu Raveendran, Sanjay B. Dhok, Rajendra M. Patrikar

Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

A Complete Hardware Advent on IEEE 802.15.4 Based Mac Layer and a Comparison with Open-ZB.

Ammu Lakshmy Rajesh, Sanket V. Kadam, Rajendra M. Patrikar

Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

Fabrication and LBM-Modeling of Directional Fluid Transport on Low-Cost Electro-Osmotic Flow Device.

T. Pravinraj, Rajendra M. Patrikar

Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

Effective Method for Temperature Compensation in Dual Band Metal MEMS Resonator.

Amol Morankar, Rajendra M. Patrikar

Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

Real Time Mixing Index Measurement of Microchannels Using OpenCV.

Khuushi, Vanadana Jain, Rajendra M. Patrikar, Raghavendra B. Deshmukh

Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018

An Optimized Design Strategy and a Paradigm for Low Power IoT Devices.

Ammu Lakshmy Rajesh, Rajendra M. Patrikar

Proceedings of the 9th International Conference on Computing, 2018

2017

Splitting and Transport of a Droplet with No External Actuation Force for Lab on Chip Devices.

T. Pravinraj, Rajendra M. Patrikar

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

Droplet Position Estimator for Open EWOD System Using Open Source Computer Vision.

Vandana Jain, Vasavi Devarasetty, Rajendra M. Patrikar

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

2016

FPGA prototyping of video watermarking for ownership verification based on H.264/AVC.

Amit M. Joshi, Vivekanand Mishra, Rajendra M. Patrikar

Multim. Tools Appl., 2016

Mechanically coupled ring-resonator filter and array (analytical and finite element model).

Vinayak Pachkawade, Rajesh C. Junghare, Rajendra M. Patrikar, Michael Kraft

IET Comput. Digit. Tech., 2016

2015

Design and comparison of 0.18-µm CMOS power amplifiers for ultra-wide-band applications.

Vishakha P. Bhale, Upena D. Dalal, Rajendra M. Patrikar

Int. J. Wirel. Mob. Comput., 2015

Real time implementation of integer DCT based video watermarking architecture.

Amit Mahesh Joshi, Vivekanand Mishra, Rajendra M. Patrikar

Int. Arab J. Inf. Technol., 2015

A small bandwidth microelectromechanical ring resonator-based bandpass filter.

Vinayak Pachkawade, Rajesh C. Junghare, Rajendra M. Patrikar

Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

A 2.47 GHz ultra NanoCrystaline diamond disk resonator with temperature compensation for RF application.

Rajesh C. Junghare, Vinayak Pachkawade, Rajendra M. Patrikar

Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

2013

Computational Functions' VLSI Implementation for Compressed Sensing.

Shrirang Korde, Amol Khandare, Raghavendra B. Deshmukh, Rajendra M. Patrikar

Proceedings of the VLSI Design and Test, 17th International Symposium, 2013

Impact of Fin Width and Graded Channel Doping on the Performance of 22nm SOI FinFET.

Jose Joseph, Rajendra M. Patrikar

Proceedings of the VLSI Design and Test, 17th International Symposium, 2013

2012

Design of Microcantilever-Based Biosensor with Digital Feedback Control Circuit.

Jayu P. Kalambe, Rajendra M. Patrikar

J. Sensors, 2012

2011

Low Power Asynchronous Sigma-Delta Modulator Using Hysteresis Level Control.

Anita Arvind Deshmukh, Raghavendra B. Deshmukh, Rajendra M. Patrikar

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011

Comparative study of switching techniques for network-on-chip architecture.

Yogita A. Sadawarte, Mahendra A. Gaikwad, Rajendra M. Patrikar

Proceedings of the 2011 International Conference on Communication, 2011

2009

Design of a novel fault-tolerant voter circuit for TMR implementation to improve reliability in digital circuits.

Ravindra V. Kshirsagar, Rajendra M. Patrikar

Microelectron. Reliab., 2009

Design of Low Power Parallel Multiplier.

Rahul M. Badghare, Sanjiv Kumar Mangal, Raghavendra B. Deshmukh, Rajendra M. Patrikar

J. Low Power Electron., 2009

2008

High Performance Computational Grids Fault Tolerance at System Level.

Manik Mujumdar, Meenakshi Bheevgade, Latesh G. Malik, Rajendra M. Patrikar

Proceedings of the First International Conference on Emerging Trends in Engineering and Technology, 2008

A CAD tool for RF MEMS devices.

Rajesh Pande, Rajendra M. Patrikar

Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007

FPGA Implementation of Low Power Parallel Multiplier.

Sanjiv Kumar Mangal, Raghavendra B. Deshmukh, Rahul M. Badghare, Rajendra M. Patrikar

Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

A CMOS Low Voltage Charge Pump.

Shantanu A. Bhalerao, Abhishek V. Chaudhary, Rajendra M. Patrikar

Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Classification Techniques for Sensor data and Clustering Architecture for Wireless Sensor Networks.

Sudhir G. Akojwar, Rajendra M. Patrikar

Proceedings of the International MultiConference of Engineers and Computer Scientists 2007, 2007

Classification Techniques with Cooperative Routing for Industrial Wireless Sensor Networks.

Sudhir G. Akojwar, Rajendra M. Patrikar

Proceedings of the Advances in Computer and Information Sciences and Engineering, 2007

2006

Design Planning for Uniform Thermal Distribution.

Rajendra M. Patrikar, Olivier Peyran

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

Design of a Reconfigurable Multiprocessor Core for Higher Performance and Reliability of Embedded Systems.

Ravindra V. Kshirsagar, Rajendra M. Patrikar

Proceedings of the IFIP VLSI-SoC 2006, 2006

Powering Wireless Sensor Nodes using Ambient RF Energy.

Shantanu A. Bhalerao, Abhishek V. Chaudhary, Raghavendra B. Deshmukh, Rajendra M. Patrikar

Proceedings of the IEEE International Conference on Systems, 2006

Stacked Active Loads For Low Power, High Speed GaAs Digital Circuits (SALFL).

A. K. Mrunal, M. A. Shirasgaonkar, Rajendra M. Patrikar

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

Highly Linear and Efficient AlGaAs/GaAs HBT Power Amplifier with Integrated Linearizer.

A. K. Mrunal, M. A. Shirasgaonkar, Rajendra M. Patrikar

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2004

Thermal distribution calculations for block level placement in embedded systems.

Rajendra M. Patrikar, K. Murali, Li Er Ping

Microelectron. Reliab., 2004