Ram Singh Rana

According to our database, Ram Singh Rana authored at least 5 papers between 1992 and 2005.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2005

Dual-modulus 127/128 FOM enhanced prescaler design in 0.35-μm CMOS technology.

Ram Singh Rana

IEEE J. Solid State Circuits, 2005

An optimized 2.4 GHz CMOS LC-tank VCO with 0.55 %/V frequency pushing and 516 MHz tuning range.

Ram Singh Rana, Xiangdong Zhou, Yong Lian

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A 1GHz CMOS fourth-order continuous-time bandpass sigma delta modulator for RF receiver front end A/D conversion.

K. Praveen Jayakar Thomas, Ram Singh Rana, Yong Lian

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

1996

A micropower analog hearing aid on low voltage CMOS digital process.

A. B. Bhattacharyya, Ram Singh Rana, S. K. Guha, Rajendar Bahl, R. Anand, M. J. Zarabi, P. A. Govindacharyulu, U. Gupta, V. Mohan, Jatin Roy, Amul Atri

Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

1992

CPM Pole-Zero Computation Using The Generalized Eigenproblem Approach.

Ram Singh Rana, A. B. Bhattacharyya

Proceedings of the Fifth International Conference on VLSI Design, 1992