Ramzi A. Jaber

Orcid: 0000-0003-0021-516X

According to our database1, Ramzi A. Jaber authored at least 9 papers between 2018 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
Multiple-Valued Logic Circuit Design and Data Transmission Intended for Embedded Systems.
CoRR, 2022

2021
Ultra-Low Energy CNFET-Based Ternary Combinational Circuits Designs.
IEEE Access, 2021

Novel Ternary Adder and Multiplier Designs Without Using Decoders or Encoders.
IEEE Access, 2021

2020
CNFET-based designs of Ternary Half-Adder using a novel "decoder-less" ternary multiplexer based on unary operators.
Microelectron. J., 2020

A Novel CNFET-Based Ternary to Binary Converter Design in Data Transmission.
Proceedings of the 32nd International Conference on Microelectronics, 2020

CNTFET-Based Design of Ternary Multiplier using Only Multiplexers.
Proceedings of the 32nd International Conference on Microelectronics, 2020

2019
High-Performance and Energy-Efficient CNFET-Based Designs for Ternary Logic Circuits.
IEEE Access, 2019

A Novel Binary to Ternary Converter using Double Pass-Transistor Logic.
Proceedings of the 31st International Conference on Microelectronics, 2019

2018
A Novel Implementation of Ternary Decoder Using CMOS DPL Binary Gates.
Proceedings of the International Arab Conference on Information Technology, 2018


  Loading...