Rathin Putatunda

According to our database, Rathin Putatunda authored at least 4 papers between 1982 and 1988.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of six.

1988

VITAL: fully automatic placement strategies for very large semicustom designs.

Rathin Putatunda, David Smith, Michael Stebnisky, Carl Puschak, Paul Patent

Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

1986

HAPPI: a chip compiler based on double-level-metal technology.

Rathin Putatunda, David Smith, Stephen McNeary, James Crabbe

Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986

1983

APSS: An automatic PLA synthesis system.

M. W. Stebnisky, M. J. McGinnis, Joseph C. Werbickas, Rathin Putatunda, A. Feller

Proceedings of the 20th Design Automation Conference, 1983

1982

Auto-delay: A program for automatic calculation of delay in LSI/VLSI chips.

Rathin Putatunda

Proceedings of the 19th Design Automation Conference, 1982