Ronald D. Barnes

According to our database1, Ronald D. Barnes authored at least 19 papers between 2000 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2014
Revisiting Using the Results of Pre-Executed Instructions in Runahead Processors.
IEEE Comput. Archit. Lett., 2014

Simple, effective rate control for video distribution in heterogeneous intelligent transportation system networks.
Proceedings of the 2014 Southwest Symposium on Image Analysis and Interpretation, 2014

2012
Realization of ITS applications through mapping technologies: A survey of advanced traveler information systems.
Proceedings of the 15th International IEEE Conference on Intelligent Transportation Systems, 2012

Phase-based scheduling and thread migration for heterogeneous multicore processors.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2011
Thread scheduling for heterogeneous multicore processors using phase identification.
SIGMETRICS Perform. Evaluation Rev., 2011

Exploiting trunked radio to support ITS network expansion and redundancy.
Proceedings of the IEEE 22nd International Symposium on Personal, 2011

A low-cost distributed instrumentation system for monitoring, identifying and diagnosing irregular patterns of behavior in critical ITS components.
Proceedings of the 14th International IEEE Conference on Intelligent Transportation Systems, 2011

Peer-based communication for a distributed, virtual Traffic Management Center.
Proceedings of the 14th International IEEE Conference on Intelligent Transportation Systems, 2011

Pathfinder: Oklahoma's advanced traveler information system.
Proceedings of the 14th International IEEE Conference on Intelligent Transportation Systems, 2011

Phase-Guided Scheduling on Single-ISA Heterogeneous Multicore Processors.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

2009
Prediction aggregation of remote traffic microwave sensors speed and volume data.
Proceedings of the 12th International IEEE Conference on Intelligent Transportation Systems, 2009

2006
Beating In-Order Stalls with "Flea-Flicker" Two-Pass Pipelining.
IEEE Trans. Computers, 2006

Tolerating Cache-Miss Latency with Multipass Pipelines.
IEEE Micro, 2006

2005
Multiple-Pass Pipelining: Enhancing in-Order Microarchitectures to Out-of-Order Performance
PhD thesis, 2005

"Flea-flicker" Multipass Pipelining: An Alternative to the High-Power Out-of-Order Offense.
Proceedings of the 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 2005

2002
Vacuum packing: extracting hardware-detected program phases for post-link optimization.
Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002

2001
An Architectural Framework for Runtime Optimization.
IEEE Trans. Computers, 2001

Code Reordering and Speculation Support for Dynamic Optimization System.
Proceedings of the 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), 2001

2000
A hardware mechanism for dynamic extraction and relayout of program hot spots.
Proceedings of the 27th International Symposium on Computer Architecture (ISCA 2000), 2000


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