Rudra Sankar Dhar

Orcid: 0000-0002-6571-3808

According to our database1, Rudra Sankar Dhar authored at least 10 papers between 2022 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2025
Design and Analysis of High-K Wrapped GaN Gate All Around FET as High-Frequency Device in IOT Systems.
IEEE Access, 2025

Accelerated Prediction of Terahertz Performance Metrics in GaN IMPATT Sources via Artificial Neural Networks.
IEEE Access, 2025

Sensitivity Analysis of Biosensor-Based SiGe Source Dual Gate Tunnel FET Having Negative Capacitance.
IEEE Access, 2025

Linearity and Noise Evaluation Compound Semiconductor-Based Highly Sensitive Junctionless Gate-All-Around FET Biosensor.
IEEE Access, 2025

Extrapolation of Metal Gate With High-K Spacer in Strained Nanosystem Channel QWB Cylindrical FET for High-Speed Applications.
IEEE Access, 2025

2024
Artificial neural network-based modelling of pacemaker and its pace tracking using discrete wavelet transform-based finite dimension repetitive controller.
Trans. Inst. Meas. Control, 2024

Advances in controller design of pacemakers for pacing control: A comprehensive review.
Annu. Rev. Control., 2024

Dielectric Modulated Charge Plasma-Based Label Free Detection of Biomolecules in Dual Metal DG TFET Biosensors.
IEEE Access, 2024

Exploration and Analysis of Temperature and Performance of Compound Semiconductor-Based Junctionless GAA FET.
IEEE Access, 2024

2022
Exploration and development of tri-gate quantum well barrier FinFET with strained nanosystem channel for enhanced performance.
Comput. Electr. Eng., 2022


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