Rudra Sankar Dhar

Orcid: 0000-0002-6571-3808

According to our database1, Rudra Sankar Dhar authored at least 13 papers between 2022 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
DWT-based FDRC for continuous pace tracking of an LSTM-based predictive pacemaker.
Biomed. Signal Process. Control., 2026

Performance Reliability of Ge Nanosheet FETs for Gaussian Distribution Channel Incorporating Interface Trap for RF and Analog Application.
IEEE Access, 2026

2025
Evolution and Analysis of GaN GAA FET Induced High-K Spacer Wrapped Gate Underlap for Superfast Circuitry and RF Applications.
IEEE Access, 2025

Design and Analysis of High-K Wrapped GaN Gate All Around FET as High-Frequency Device in IOT Systems.
IEEE Access, 2025

Accelerated Prediction of Terahertz Performance Metrics in GaN IMPATT Sources via Artificial Neural Networks.
IEEE Access, 2025

Sensitivity Analysis of Biosensor-Based SiGe Source Dual Gate Tunnel FET Having Negative Capacitance.
IEEE Access, 2025

Linearity and Noise Evaluation Compound Semiconductor-Based Highly Sensitive Junctionless Gate-All-Around FET Biosensor.
IEEE Access, 2025

Extrapolation of Metal Gate With High-K Spacer in Strained Nanosystem Channel QWB Cylindrical FET for High-Speed Applications.
IEEE Access, 2025

2024
Artificial neural network-based modelling of pacemaker and its pace tracking using discrete wavelet transform-based finite dimension repetitive controller.
Trans. Inst. Meas. Control, 2024

Advances in controller design of pacemakers for pacing control: A comprehensive review.
Annu. Rev. Control., 2024

Dielectric Modulated Charge Plasma-Based Label Free Detection of Biomolecules in Dual Metal DG TFET Biosensors.
IEEE Access, 2024

Exploration and Analysis of Temperature and Performance of Compound Semiconductor-Based Junctionless GAA FET.
IEEE Access, 2024

2022
Exploration and development of tri-gate quantum well barrier FinFET with strained nanosystem channel for enhanced performance.
Comput. Electr. Eng., 2022


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