Rui Liu

According to our database, Rui Liu authored at least 13 papers between 2022 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2026

GPA: A General-Purpose In-Memory Computing Accelerator.

Xiaoyu Zhang, Zerun Li, Rui Liu, Libo Shen, Boyu Long, Xueqi Li, Yinhe Han, Xiaoming Chen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

MACAM: A Flexible Computing-in-Memory Accelerator for Sparse Matrix-Dense Vector Multiplication.

Xiaoyu Zhang, Rui Liu, Zerun Li, Yinhe Han, Xiaoming Chen

Proceedings of the Design, Automation & Test in Europe Conference, 2026

2025

In-Memory Computing Accelerator for Iterative Linear Algebra Solvers.

Rui Liu, Zerun Li, Xiaoyu Zhang, Xiaoming Chen, Yinhe Han, Minghua Tang

IEEE Comput. Archit. Lett., 2025

CIM-BLAS: Computing-in-Memory Accelerator for BLAS.

Rui Liu, Zerun Li, Xiaoyu Zhang, Xiaoming Chen, Yinhe Han, Minghua Tang

Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

2024

Crypto-DSEDA: A Domain-Specific EDA Flow for CiM-Based Cryptographic Accelerators.

Rui Liu, Zerun Li, Xiaoyu Zhang, Wanqian Li, Libo Shen, Rui Tang, Zhejian Luo, Xiaoming Chen, Yinhe Han, Minghua Tang

IEEE Des. Test, October, 2024

GAS: General-Purpose In-Memory-Computing Accelerator for Sparse Matrix Multiplication.

Xiaoyu Zhang, Zerun Li, Rui Liu, Xiaoming Chen, Yinhe Han

IEEE Trans. Computers, June, 2024

MemSort: In-Memory Sorting Architecture.

Rui Liu, Xiaoyu Zhang, Xinyu Wang, Feng Min, Zhejian Luo, Xiaoming Chen, Yinhe Han, Minghua Tang

Proceedings of the 42nd IEEE International Conference on Computer Design, 2024

2023

FeCrypto: Instruction Set Architecture for Cryptographic Algorithms Based on FeFET-Based In-Memory Computing.

Rui Liu, Xiaoyu Zhang, Zhiwen Xie, Xinyu Wang, Zerun Li, Xiaoming Chen, Yinhe Han, Minghua Tang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2023

Hardware-Software Co-Design for Content-Based Sparse Attention.

Rui Tang, Xiaoyu Zhang, Rui Liu, Zhejian Luo, Xiaoming Chen, Yinhe Han

Proceedings of the 41st IEEE International Conference on Computer Design, 2023

LIM-GEN: A Data-Guided Framework for Automated Generation of Heterogeneous Logic-in-Memory Architecture.

Libo Shen, Boyu Long, Rui Liu, Xiaoyu Zhang, Yinhe Han, Xiaoming Chen

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

FSPA: An FeFET-based Sparse Matrix-Dense Vector Multiplication Accelerator.

Xiaoyu Zhang, Zerun Li, Rui Liu, Xiaoming Chen, Yinhe Han

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

Re-FeMAT: A Reconfigurable Multifunctional FeFET-Based Memory Architecture.

Xiaoyu Zhang, Rui Liu, Tao Song, Yuxin Yang, Yinhe Han, Xiaoming Chen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

FeMIC: Multi-Operands in-Memory Computing Based on FeFETs.

Rui Liu, Xiaoyu Zhang, Xiaoming Chen, Yinhe Han, Minghua Tang

Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022