S. M. Mojahidul Ahsan

Orcid: 0000-0003-0059-7436

According to our database1, S. M. Mojahidul Ahsan authored at least 4 papers between 2024 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2025
A Flexible and Accurate Circuit-Level Substrate for Future DRAM Design and Analysis.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2025

A Reconfigurable and Accurate Circuit-Level Substrate for DRAM Design and Analysis.
Proceedings of the Great Lakes Symposium on VLSI 2025, GLSVLSI 2025, New Orleans, LA, USA, 30 June 2025, 2025

2024
Hardware Accelerators for Artificial Intelligence.
CoRR, 2024

Accurate, Yet Scalable: A SPICE-based Design and Optimization Framework for eNVM based Analog In-memory Computing.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024


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