Md Sakib Hasan
Orcid: 0000-0002-4792-6236
According to our database1,
Md Sakib Hasan
authored at least 35 papers
between 2017 and 2024.
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Bibliography
2024
Intrinsic Voltage Offsets in Memcapacitive Bio-Membranes Enable High-Performance Physical Reservoir Computing.
CoRR, 2024
2023
Biomembrane-Based Memcapacitive Reservoir Computing System for Energy-Efficient Temporal Data Processing.
Adv. Intell. Syst., December, 2023
IEEE Trans. Circuits Syst. II Express Briefs, March, 2023
Brain-Inspired Reservoir Computing Using Memristors with Tunable Dynamics and Short-Term Plasticity.
CoRR, 2023
Energy-efficient memcapacitive physical reservoir computing system for temporal data processing.
CoRR, 2023
IEEE Access, 2023
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
2022
Cascading CMOS-Based Chaotic Maps for Improved Performance and Its Application in Efficient RNG Design.
IEEE Access, 2022
IEEE Access, 2022
2021
Physically Unclonable and Reconfigurable Computing System (PURCS) for Hardware Security Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
CoRR, 2021
Design of an Enhanced Reconfigurable Chaotic Oscillator using G4FET-NDR Based Discrete Map.
CoRR, 2021
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021
Proceedings of the 28th IEEE International Conference on Electronics, 2021
Self-Parameterized Chaotic Map: A Hardware-efficient Scheme Providing Wide Chaotic Range.
Proceedings of the 28th IEEE International Conference on Electronics, 2021
Design of a Low-Overhead Random Number Generator Using CMOS-based Cascaded Chaotic Maps.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021
2020
A Chaos-Based Complex Micro-instruction Set for Mitigating Instruction Reverse Engineering.
J. Hardw. Syst. Secur., 2020
CoRR, 2020
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
DC modelling of SOI four-gate transistor (G<sup>4</sup>FET) for implementation in circuit simulator using multivariate regression polynomial.
IET Circuits Devices Syst., 2019
Modeling of Silicon Photomultiplier Based on Perimeter Gated Single Photon Avalanche Diode.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
Stochasticity in Neuromorphic Computing: Evaluating Randomness for Improved Performance.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Proceedings of the IEEE International Conference on Consumer Electronics, 2019
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
2018
Modeling of SOI four-gate transistor (G<sup>4</sup>FET) using multidimensional spline interpolation method.
Microelectron. J., 2018
Design of a Reconfigurable Chaos Gate with Enhanced Functionality Space in 65nm CMOS.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018
2017
Numerical modeling and implementation in circuit simulator of SOI four-gate transistor (G<sup>4</sup>FET) using multidimensional Lagrange and Bernstein polynomial.
Microelectron. J., 2017