Sahith Guturu

Orcid: 0000-0001-7080-9030

According to our database1, Sahith Guturu authored at least 5 papers between 2021 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2025
A Power-Efficient Gaussian Filter Architecture Using Adder Compressors for Edge Detection Application.
Circuits Syst. Signal Process., March, 2025

2024
HEAD: High-Speed Approximate HEterogeneous ADder for Error-Resilient Applications.
J. Circuits Syst. Comput., December, 2024

2023
Design methodology for highly accurate approximate multipliers for error resilient applications.
Comput. Electr. Eng., September, 2023

2022
Design and exploration of low-power SAD architectures using approximate compressors for Integer Motion Estimation.
Microprocess. Microsystems, October, 2022

2021
Power-Efficient MLOA for error resilient applications.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021


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