Sajad A. Loan

Orcid: 0000-0002-3936-3947

According to our database1, Sajad A. Loan authored at least 14 papers between 2013 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Design and Simulation of Dual-Metal-Gate Tunnel Field Effect Transistor with Biomolecule Sensing Applications.
Proceedings of the International Conference on Microelectronics, 2023

2022
High performance accelerators for deep neural networks: A review.
Expert Syst. J. Knowl. Eng., 2022

High Performance Hybrid Conduction Enhancement Mode High Electron Mobility Transistors.
Proceedings of the International Conference on Microelectronics, 2022

CNTFET based 2-bit Unary weighted Current Steering Digital to Analog Converter using Cascode Current Mirror Technique.
Proceedings of the International Conference on Microelectronics, 2022

2021
A 4-bit Binary weighted Current Steering Digital To Analog Converter based on CNTFET.
Proceedings of the International Conference on Microelectronics, 2021

Double Gate TFET with Germanium Pocket and Metal drain using Dual Oxide.
Proceedings of the International Conference on Microelectronics, 2021

Design and Simulation of Carbon Nanotube Based Current Source Load Differential Amplifier.
Proceedings of the International Conference on Microelectronics, 2021

2020
Metal controlled nanoscaled dopingless MOSFET on selective/partial buried oxide.
IET Circuits Devices Syst., 2020

Stacked Nanosheet Based Reconfigurable FET.
Proceedings of the 32nd International Conference on Microelectronics, 2020

2019
A Method to Implement Field-Induced Quantum-Confinement in MOSCAP-Based Line TFET Architectures.
Proceedings of the 31st International Conference on Microelectronics, 2019

2018
Hybrid AlGaN/GaN high-electron mobility transistor: design and simulation.
IET Circuits Devices Syst., 2018

Electrostatically-Doped Hetero-Barrier Tunnel Field Effect Transistor: Design and Investigation.
IEEE Access, 2018

2014
High performance charge plasma based multi zone lateral bipolar junction transistor.
Proceedings of the 26th International Conference on Microelectronics, 2014

2013
A novel VLSI architecture for a fuzzy inference processor using Gaussian-shaped membership function.
J. Intell. Fuzzy Syst., 2013


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