Sang-Geun Bae

According to our database1, Sang-Geun Bae authored at least 9 papers between 2014 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
A ΔΣ Modulator-Based Spread-Spectrum Clock Generator with Digital Compensation and Calibration for Phase-Locked Loop Bandwidth.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

12-Gb/s Over Four Balanced Lines Utilizing NRZ Braid Clock Signaling With No Data Overhead and Spread Transition Scheme for 8K UHD Intra-Panel Interfaces.
IEEE J. Solid State Circuits, 2019

2018
A Spread Spectrum Clock Generator With Nested Modulation Profile for a High-Resolution Display System.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

2017
A 250-Mb/s to 6-Gb/s Referenceless Clock and Data Recovery Circuit With Clock Frequency Multiplier.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

A 5-GHz Subsampling PLL-Based Spread-Spectrum Clock Generator by Calibrating the Frequency Deviation.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

3-Gb/s High-Speed True Random Number Generator Using Common-Mode Operating Comparator and Sampling Uncertainty of D Flip-Flop.
IEEE J. Solid State Circuits, 2017

29.5 12Gb/s over four balanced lines utilizing NRZ braid clock signaling with 100% data payload and spread transition scheme for 8K UHD intra-panel interfaces.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2016
An Add-On Type Real-Time Jitter Tolerance Enhancer for Digital Communication Receivers.
IEEE Trans. Very Large Scale Integr. Syst., 2016

2014
An 180 nm CMOS 1.84-to-3.62 GHz fractional-N frequency synthesizer with skewed-reset PFD for removing noise-folding effect.
IEICE Electron. Express, 2014


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