Sarah Johari
According to our database1,
Sarah Johari
authored at least 6 papers
between 2023 and 2025.
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Bibliography
2025
Improving Scalability of NoC-Based Neuromorphic Hardware with Compressed AER (C-AER) Protocol.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
A Framework for Automatic Synthesis of Neuromorphic Architectures with Heterogeneous Integration of CMOS and Memristors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
2024
CMOS-Memristor Hybrid Design of A Neuromorphic Crossbar Array with Integrated Inference and Training.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024
Towards Biology-Inspired Fault Tolerance of Neuromorphic Hardware for Space Applications.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024
Proceedings of the 58th Asilomar Conference on Signals, 2024
2023
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023