Sarvesh Patankar

According to our database, Sarvesh Patankar authored at least 2 papers between 2013 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2021

Hybrid Methodology for Verification of SW Safety Mechanisms.

Sarvesh Patankar, Sainath Karlapalem, Sakshi Biyani, Wen Chen, Roman Chovanec, Martin Vlk, Martin Kaspar

Proceedings of the 39th IEEE VLSI Test Symposium, 2021

2013

Automatic Test Bench Generation and Connection in Modern Verification Environments: Methodology and Tool.

Rohit Srivastava, Gaurav Gupta, Sarvesh Patankar, Nandini Mudgil

Proceedings of the VLSI Design and Test, 17th International Symposium, 2013