Seonyoung Lee

According to our database1, Seonyoung Lee authored at least 13 papers between 2006 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

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Links

On csauthors.net:

Bibliography

2019
Design of hand skeleton extraction accelerator for a real-time hand gesture recognition.
Proceedings of the 2019 International SoC Design Conference, 2019

2017
Transparent Dual Memory Compression Architecture.
Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017

2016
Efficient and real-time stereo matching hardware architecture for high-resolution image.
Proceedings of the International SoC Design Conference, 2016

2013
High-performance HOG feature extractor circuit for driver assistance system.
Proceedings of the IEEE International Conference on Consumer Electronics, 2013

2012
Design of unified support vector machine circuit for pedestrians and cars detection.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012

Design of high-speed support vector machine circuit for driver assistance system.
Proceedings of the International SoC Design Conference, 2012

2011
Design of AdaBoost classifier circuit using Haar-like features for automobile applications.
Proceedings of the International SoC Design Conference, 2011

2010
Implementation of lane detection system using optimized hough transform circuit.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009
High-performance architecture of H.264 integer-pixel motion estimation IP for real-time 1080HD video CODEC.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

2008
Design of high-performance transform and quantization circuit for unified video CODEC.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007
Design of Transform and Quantization Circuit for Multi-Standard Integrated Video Decoder.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

2006
An Efficient Architecture of High-Performance Deblocking Filter for H.264/AVC.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

Implementation of an AMBA-Compliant IP for H.264 Transform and Quantization.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006


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