Seyedeh Nazanin Afrasiabi

According to our database, Seyedeh Nazanin Afrasiabi authored at least 3 papers between 2021 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

Harmonic Compensation of a Power-Hardware-in-the-Loop Based Emulator for Induction Machines.

Seyedeh Nazanin Afrasiabi, Mohammad Babaie, Chunyan Lai, Pragasen Pillay

IEEE Trans. Ind. Electron., September, 2025

A comparative study on Power Hardware-in-the-Loop-based emulation of a Brushless DC machine using advanced test bench.

Mathews Boby, Seyedeh Nazanin Afrasiabi, Rajendra Thike, K. S. Amitkumar

Elektrotech. Informationstechnik, February, 2025

2021

Dead Time Analysis of a Power-Hardware-in-the-Loop Emulator for Induction Machines.

Seyedeh Nazanin Afrasiabi, Chunyan Lai, Pragasen Pillay

Proceedings of the IECON 2021, 2021