Shangshang Yao

Orcid: 0000-0001-7217-1712

According to our database1, Shangshang Yao authored at least 7 papers between 2021 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2025
Approx-T: Design Methodology for Approximate Multiplication Units via Taylor-Expansion.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., August, 2025

Biased Compressor Based Approximate Multiplier Design Using Genetic Algorithm.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2023
ImprLM: An Improved Logarithmic Multiplier Design Approach via Iterative Linear-Compensation and Modified Dynamic Segment.
Proceedings of the 41st IEEE International Conference on Computer Design, 2023

2022
FHAM: FPGA-based High-Efficiency Approximate Multipliers via LUT Encoding.
Proceedings of the IEEE 40th International Conference on Computer Design, 2022

A High-performance SpMV Accelerator on HBM-equipped FPGAs.
Proceedings of the 24th IEEE Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, 2022

Hardware-Efficient FPGA-Based Approximate Multipliers for Error-Tolerant Computing.
Proceedings of the International Conference on Field-Programmable Technology, 2022

2021
An Efficient Hybrid Parallel Compression Approximate Multiplier.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021


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