Shraman Biswas

Orcid: 0009-0002-7108-4056

According to our database¹, Shraman Biswas authored at least 3 papers between 2024 and 2026.

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Timeline

Book In proceedings Article PhD thesis Dataset Other

2026

Hardware-software codesign in an SoC-FPGA platform to implement a fusion framework using reduced dual-stack convolutional autoencoder.

[DOI]

Biomed. Signal Process. Control., 2026

2024

Design of A Custom IP Core for Concatenated SVM Model to Classify Multi-class Handwritten Numerical Characters.

[DOI]

Proceedings of the 28th International Symposium on VLSI Design and Test, 2024

Machine Learning Algorithm for Handwritten Numerical Character Identification Using FPGA Based Custom IP Core.

[DOI]

Proceedings of the IEEE Region 10 Conference, 2024