Simon Schwitanski

Orcid: 0000-0001-7121-7205

According to our database1, Simon Schwitanski authored at least 11 papers between 2016 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Towards Correctness Checking of MPI Partitioned Communication in MUST.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

RMARaceBench: A Microbenchmark Suite to Evaluate Race Detection Tools for RMA Programs.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

Mapping High-Level Concurrency from OpenMP and MPI to ThreadSanitizer Fibers.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

Improve and Stabilize the Classification Results of DataRaceBench.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

Adding Microbenchmarks with SIMD Data Races to DataRaceBench.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

A Shim Layer for Transparently Adding Meta Data to MPI Handles.
Proceedings of the 30th European MPI Users' Group Meeting, 2023

2022
Towards a Hybrid MPI Correctness Benchmark Suite.
Proceedings of the EuroMPI/USA'22: 29th European MPI Users' Group Meeting, Chattanooga, TN, USA, September 26, 2022

An On-the-Fly Method to Exchange Vector Clocks in Distributed-Memory Programs.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

On-the-Fly Data Race Detection for MPI RMA Programs with MUST.
Proceedings of the Sixth IEEE/ACM International Workshop on Software Correctness for HPC Applications, 2022

2019
DataRaceOnAccelerator - A Micro-benchmark Suite for Evaluating Correctness Tools Targeting Accelerators.
Proceedings of the Euro-Par 2019: Parallel Processing Workshops, 2019

2016
An OpenMP Epoch Model for Correctness Checking.
Proceedings of the 45th International Conference on Parallel Processing Workshops, 2016


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