Siva Ramakrishna Pillutla

Orcid: 0000-0001-9926-4230

According to our database1, Siva Ramakrishna Pillutla authored at least 6 papers between 2019 and 2022.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of six.

Timeline

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Bibliography

2022
An Efficient two Dimensional Mapping of External Surroundings for Robotics and Drones.
Proceedings of the 13th International Conference on Computing Communication and Networking Technologies, 2022

2021
Low-latency area-efficient systolic bit-parallel <i>GF</i>(2m) multiplier for a narrow class of trinomials.
Microelectron. J., 2021

Low-complexity bit-serial sequential polynomial basis finite field GF(2m) Montgomery multipliers.
Microprocess. Microsystems, 2021

2020
Area-efficient low-latency polynomial basis finite field GF(2<sup><i>m</i></sup>) systolic multiplier for a class of trinomials.
Microelectron. J., 2020

High-throughput area-delay-efficient systolic multiplier over GF(2<sup><i>m</i></sup>) for a class of trinomials.
Microprocess. Microsystems, 2020

2019
A high-throughput fully digit-serial polynomial basis finite field GF(2<sup>m</sup>) multiplier for IoT applications.
Proceedings of the TENCON 2019, 2019


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