Soo-Han Choi

According to our database, Soo-Han Choi authored at least 3 papers between 2002 and 2010.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2010

Suppression of Edge Effects Based on Analytic Model for Leakage Current Reduction of Sub-40 nm DRAM Device.

Soo-Han Choi, Young Hee Park, Chul-Hong Park, Sang Hoon Lee, Moon-Hyun Yoo, Jun Dong Cho, Gyu Tae Kim

IEICE Trans. Electron., 2010

2005

A Fast Lithography Verification Framework for Litho-Friendly Layout Design.

Yong-Chan Ban, Soo-Han Choi, Ki-Hung Lee, Dong-Hyun Kim, Jisuk Hong, Yoo-Hyon Kim, Moon-Hyun Yoo, Jeong-Taek Kong

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

2002

A Hybrid PPC Method Based on the Empirical Etch Model for the 0.14µm DRAM Generation and Beyond.

Chul-Hong Park, Soo-Han Choi, Sang-Uhk Rhie, Dong-Hyun Kim, Jun-Seong Park, Tae-Hwang Jang, Ji-Soong Park, Yoo-Hyon Kim, Moon-Hyun Yoo, Jeong-Taek Kong

Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002