Sridharan Moorthi

According to our database, Sridharan Moorthi authored at least 11 papers between 2008 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

Audiogram matching in hearing aid using approximate arithmetic.

R. Ramya, Sridharan Moorthi

Multidimens. Syst. Signal Process., 2021

2019

A wide tunable fast settling 4-bit digitally controlled oscillator for reconfigurable multi-band RF applications.

Aditya S., Sridharan Moorthi

Microelectron. J., 2019

Performance Evaluation of Wordlength Reduction Based Area and Power Efficient Approximate Multiplier for Mobile Multimedia Applications.

R. Ramya, Sridharan Moorthi

Circuits Syst. Signal Process., 2019

2015

Design, Operation, and Control of S3 Inverter for Single-Phase Microgrid Applications.

Bonthapalle Dastagiri Reddy, M. P. Selvan, Sridharan Moorthi

IEEE Trans. Ind. Electron., 2015

2013

Intelligent location identification and passenger-alert system in Indian Railways using GPS receiver.

N. K. Anish, Sridharan Moorthi

Proceedings of the AFRICON 2013, Pointe aux Piments, Mauritius, September 9-12, 2013, 2013

Ethernet based industry automation using FPGA.

N. K. Anish, B. Kowshick, Sridharan Moorthi

Proceedings of the AFRICON 2013, Pointe aux Piments, Mauritius, September 9-12, 2013, 2013

FPGA based control scheme for a single-stage grid-connected solar photovoltaic system.

N. K. Anish, Murali Chakravarthi, Bonthapalle Dastagiri Reddy, Sridharan Moorthi, M. P. Selvan

Proceedings of the AFRICON 2013, Pointe aux Piments, Mauritius, September 9-12, 2013, 2013

2012

Implementation of hybrid ANN-PSO algorithm on FPGA for harmonic estimation.

B. Vasumathi, Sridharan Moorthi

Eng. Appl. Artif. Intell., 2012

2011

NoC Based Distributed Partitionable Memory System for a Coarse Grain Reconfigurable Architecture.

Muhammad Adeel Tajammul, Muhammad Ali Shami, Ahmed Hemani, Sridharan Moorthi

Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011

2009

A systematic design approach for low-power 10-bit 100 MS/s pipelined ADC.

D. Meganathan, Amrith Sukumaran, M. M. Dinesh Babu, Sridharan Moorthi, R. Deepalakshmi

Microelectron. J., 2009

2008

A 52.6 mW 10-bit, 100 MS/s Pipelined CMOS Analog-To-Digital Converter.

D. Meganathan, Sridharan Moorthi, Amrith Sukumaran, M. M. Dinesh Babu, J. Raja Paul Perinbam

J. Low Power Electron., 2008