Srini W. Seetharam

According to our database1, Srini W. Seetharam authored at least 4 papers between 1993 and 1995.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

1995
A High Speed Implementation of Adaptive Shaping for Dynamic Bandwidth Allocation.
Proceedings of the 4th International Symposium on High Performance Distributed Computing (HPDC '95), 1995

1994
A Pipelined Architecture to Map ATM Cells to 622 Mb/s SONET OC-12 Payloads.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

A Single Chip Implementation of Receive Path Termination for SONET OC-12c and Quadruple SONET OC-3c.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993
A Parallel SONET Scrambler/Descrambler Architecture.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993


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