Subir Kumar Roy

According to our database, Subir Kumar Roy authored at least 8 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

FPGA Based Hardware Accelerator for Training Implicit Neural Representations on Edge Devices.

Shaik Mohammed Waseem, Imrose Batterywala, Subir Kumar Roy, Sachit Rao

Proceedings of the 12th International Conference on Intelligent Systems and Embedded Design, 2024

2023

FPGA implementation of Proximal Policy Optimization algorithm for Edge devices with application to Agriculture Technology.

Shaik Mohammed Waseem, Subir Kumar Roy

J. Ambient Intell. Humaniz. Comput., October, 2023

2022

DynPath-Non-Intrusive Feature-Rich Hardware-Based Execution Path Profiler.

Manpreet Kaur Jaswal, Subir Kumar Roy

IEEE Access, 2022

Resource Constrained Hardware Architecture for Training Deep Neural Networks at the Edge - FPGA Implementation.

Alavala Venkata Suraj, Shaik Mohammed Waseem, Subir Kumar Roy

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

2020

A Decimal Multiplier With Improved Speed Using Semi-Parallel Iterative Approach.

Spoorthi M. N., Subir Kumar Roy

Proceedings of the 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020

DynRP- Non-Intrusive Profiler for Dynamic Reconfigurability.

Manpreet Kaur Jaswal, Subir Kumar Roy

Proceedings of the 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020

2018

Validating the Claim - Defeating HaTCh : Building Malicious IP cores.

Anshu Bhardwaj, Subir Kumar Roy

CoRR, 2018

2017

Defeating HaTCh: Building Malicious IP Cores.

Anshu Bhardwaj, Subir Kumar Roy

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017