Sudha Ellison Mathe

According to our database, Sudha Ellison Mathe authored at least 4 papers between 2017 and 2021.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of six.

2021

A systematic literature review on prototyping with Arduino: Applications, challenges, advantages, and limitations.

Hari Kishan Kondaveeti, Nandeesh Kumar Kumaravelu, Sunny Dayal Vanambathina, Sudha Ellison Mathe, Suseela Vappangi

Comput. Sci. Rev., 2021

2018

Design and Implementation of a Novel Bit-Parallel Systolic Multiplier Over GF(2^<i>m</i>) for Irreducible Pentanomials.

Sudha Ellison Mathe, Lakshmi Boppana

J. Circuits Syst. Comput., 2018

Bit-parallel systolic multiplier over GF ( 2 m ) for irreducible trinomials with ASIC and FPGA implementations.

Sudha Ellison Mathe, Lakshmi Boppana

IET Circuits Devices Syst., 2018

2017

Design and Implementation of a Sequential Polynomial Basis Multiplier over GF(2m).

Sudha Ellison Mathe, Lakshmi Boppana

KSII Trans. Internet Inf. Syst., 2017