Suman Lata Tripathi

According to our database, Suman Lata Tripathi authored at least 12 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A Review on Tongue Based Assistive Technology, Devices and FPGA Processors Using Machine Learning Module.

Dasari Lakshmi Prasanna, Suman Lata Tripathi

Wirel. Pers. Commun., January, 2024

2023

A boosted chimp optimizer for numerical and engineering design optimization challenges.

Ch. Leela Kumari, Vikram Kumar Kamboj, S. K. Bath, Suman Lata Tripathi, Megha Khatri, Shivani Sehgal

Eng. Comput., August, 2023

Epileptic seizure detection on a compressed EEG signal using energy measurement.

Inung Wijayanto, Annisa Humairani, Sugondo Hadiyoso, Achmad Rizal, Dasari Lakshmi Prasanna, Suman Lata Tripathi

Biomed. Signal Process. Control., August, 2023

Low Power and Suppressed Noise 6T, 7T SRAM Cell Using 18 nm FinFET.

T. Santosh Kumar, Suman Lata Tripathi

Wirel. Pers. Commun., May, 2023

Design of tunnel FET architectures for low power application using improved Chimp optimizer algorithm.

Sabitabrata Bhattacharya, Suman Lata Tripathi, Vikram Kumar Kamboj

Eng. Comput., April, 2023

Curvelet Transform Based Compression Algorithm for Low Resource Hyperspectral Image Sensors.

Shrish Bajpai, Divya Sharma, Monauwer Alam, Vishal Singh Chandel, Amit Kumar Pandey, Suman Lata Tripathi

J. Electr. Comput. Eng., 2023

2022

Variability Analysis of SBOX With CMOS 45 nm Technology.

Abhishek Kumar, Suman Lata Tripathi, Umashankar Subramaniam

Wirel. Pers. Commun., 2022

Design and Analysis of Low Power Bio-amplifier with Current Mirror Topology at CMOS 45nm Technology Node.

Abhishek Kumar, Suman Lata Tripathi, Chaman Verma, Maria Simona Raboaca, Florentina-Magda Enescu, Traian Candin Mihaltan

Proceedings of the 14th International Conference on Electronics, 2022

2021

Leakage Reduction in 18 nm FinFET based 7T SRAM Cell using Self Controllable Voltage Level Technique.

T. Santosh Kumar, Suman Lata Tripathi

Wirel. Pers. Commun., 2021

Column shifting algorithm to compute iteration bound of finite impulse response systems having inline delays.

Jyotirmoy Pathak, Suman Lata Tripathi

Int. J. Embed. Syst., 2021

2020

Design of Low Power Si_0.7Ge_0.3 Pocket Junction-Less Tunnel FET Using Below 5 nm Technology.

Suman Lata Tripathi, Govind Singh Patel

Wirel. Pers. Commun., 2020

2019

Low leakage pocket junction-less DGTFET with biosensing cavity region.

Suman Lata Tripathi, Raju Patel, Vimal Kumar Agrawal

Turkish J. Electr. Eng. Comput. Sci., 2019