Sung-Geun Kim

According to our database, Sung-Geun Kim authored at least 8 papers between 2012 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

A Low-Power 40-Gb/s Pre-Emphasis PAM-4 Transmitter With Toggling Serializers.

Dae Hyun Kwon, Minkyu Kim, Sung-Geun Kim, Woo-Young Choi

IEEE Trans. Circuits Syst. II Express Briefs, 2020

2019

A 32-Gb/s PAM-4 Quarter-Rate Clock and Data Recovery Circuit With an Input Slew-Rate Tolerant Selective Transition Detector.

Dae Hyun Kwon, Minkyu Kim, Sung-Geun Kim, Woo-Young Choi

IEEE Trans. Circuits Syst. II Express Briefs, 2019

2016

A Low-Voltage PLL With a Supply-Noise Compensated Feedforward Ring VCO.

Sung-Geun Kim, Jinsoo Rhim, Dae Hyun Kwon, Min-Hyeong Kim, Woo-Young Choi

IEEE Trans. Circuits Syst. II Express Briefs, 2016

A 5-8 Gb/s low-power transmitter with 2-tap pre-emphasis based on toggling serialization.

Sung-Geun Kim, Tongsung Kim, Dae Hyun Kwon, Woo-Young Choi

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

2014

Cooperative behavior control of robot group using stress antibody allotment reward.

Sung-Geun Kim, Shinya Taguchi, Su-Ill Hong, Hee-Hyol Lee

Artif. Life Robotics, 2014

A 0.4-V, 500-MHz, ultra-low-power phase-locked loop for near-threshold voltage operation.

Joung-Wook Moon, Sung-Geun Kim, Dae Hyun Kwon, Woo-Young Choi

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013

A 990-µW 1.6-GHz PLL Based on a Novel Supply-Regulated Active-Loop-Filter VCO.

Kwang-Chun Choi, Sung-Geun Kim, Seung-Woo Lee, Bhum-Cheol Lee, Woo-Young Choi

IEEE Trans. Circuits Syst. II Express Briefs, 2013

2012

Integration of dual channel timing formatter system for high speed memory test equipment.

Jaeseok Park, Ingeol Lee, Young-Seok Park, Sung-Geun Kim, Kyungho Ryu, Dong-Hoon Jung, Kangwook Jo, Choong Keun Lee, Hongil Yoon, Seong-Ook Jung, Woo-Young Choi, Sungho Kang

Proceedings of the International SoC Design Conference, 2012