Supriya Karmakar

According to our database, Supriya Karmakar authored at least 11 papers between 2013 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

Artificial intelligence (AI) to study self-discharge batteries.

Diego Córdova, Gregory Medwig, Abhijith Variathu Roy, Supriya Karmakar

Proceedings of the 12th IEEE Annual Ubiquitous Computing, 2021

2020

Simulator of semiconductor devices for multivalued logic.

Supriya Karmakar

IET Circuits Devices Syst., 2020

Three-state dynamic random-access memory (DRAM).

Supriya Karmakar

IET Circuits Devices Syst., 2020

Design of ternary logic inverter using quantum dot gate nonvolatile memory (QDNVM).

Supriya Karmakar

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2019

Eight-bit ADC using non-volatile flash memory.

Supriya Karmakar, John A. Chandy, Faquir C. Jain

IET Circuits Devices Syst., 2019

Generation of four states in MOSFET for future multivalued logic circuit design.

Supriya Karmakar

IET Circuits Devices Syst., 2019

2016

Application of quantum dot gate nonvolatile memory (QDNVM) in image segmentation.

Supriya Karmakar, Mukesh Gogna, Faquir C. Jain

Signal Image Video Process., 2016

2015

Unipolar Logic Gates Based on Spatial Wave-Function Switched FETs.

Supriya Karmakar, John A. Chandy, Faquir C. Jain

IEEE Trans. Very Large Scale Integr. Syst., 2015

Three-state quantum dot gate field-effect transistor in silicon-on-insulator.

Supriya Karmakar, Mukesh Gogna, Ernesto Suarez, Faquir C. Jain

IET Circuits Devices Syst., 2015

2014

Implementation of Six Bit ADC and DAC Using Quantum Dot Gate Non-Volatile Memory.

Supriya Karmakar, John A. Chandy, Faquir C. Jain

J. Signal Process. Syst., 2014

2013

Design of Ternary Logic Combinational Circuits Based on Quantum Dot Gate FETs.

Supriya Karmakar, John A. Chandy, Faquir C. Jain

IEEE Trans. Very Large Scale Integr. Syst., 2013