Syeda Hurmath Juveria

According to our database, Syeda Hurmath Juveria authored at least 2 papers between 2025 and 2026.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2026

Thermal Reliability Analysis for 7-nm FinFET Based Positive Edge Triggered TSPC Flip-Flop for Future IoT and AI Applications.

Syeda Hurmath Juveria, J. Ajayan, Shashank Rebelli

Circuits Syst. Signal Process., April, 2026

2025

A Review of Performance and Reliability Issues in D Flip-Flops for Future Artificial Intelligence and Internet of Things Applications.

Syeda Hurmath Juveria, Shashank Rebelli, J. Ajayan, Amit Krishna Dwivedi, D. Nirmal

IET Circuits Devices Syst., 2025