T. Wieja

According to our database1, T. Wieja authored at least 1 paper in 2000.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2000
Embedded Systems Verification with FPGA-Enhanced In-Circuit Emulator.
Proceedings of the 13th International Symposium on System Synthesis, 2000


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