Tadikonda Venkata Sai Chaitanya

According to our database, Tadikonda Venkata Sai Chaitanya authored at least 1 paper in 2026.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2026

Sparsity Aware Pre-processing for Systolic Array Dataflow Acceleration.

Tadikonda Venkata Sai Chaitanya, D. V. Bhargav, Madhav Rao

Proceedings of the 27th International Symposium on Quality Electronic Design, 2026