Taku Ogura

According to our database, Taku Ogura authored at least 2 papers between 2006 and 2017.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2017

A 58-nm 2-Gb MLC "B4-Flash" Memory with Flexible Multisector Architecture.

Taku Ogura, Yasushi Kasa, Kazuhide Kurosaki, Mitsuhiro Tomoeda, Hisakazu Otoi, Satoshi Shimizu, Masafumi Katsumata, Natsuo Ajika, Kazuo Kobayashi

IEEE J. Solid State Circuits, 2017

2006

A 1.8-V 256-Mb Multilevel Cell NOR Flash Memory With BGO Function.

Taku Ogura, Masahiro Hosoda, Tomoya Ogawa, Tamiyu Kato, Akihiko Kanda, Tomoyuki Fujisawa, Satoshi Shimizu, Masafumi Katsumata

IEEE J. Solid State Circuits, 2006